The success of silicon MOSFET devices is largely built upon the fact that high-quality dielectric materials can be deposited on a silicon substrate without a high interface charge between the dielectric material and the silicon. High interface charges are undesirable because these charges can negatively affect the density of electrons at the interface of the silicon and dielectric materials, which in turn, can lead to inconsistent and unreliable deposition of the dielectric material. A dielectric material, such as silicon dioxide (SiO2), may be formed on a silicon crystal with a highly reliable crystalline interface and an extremely low interface charge density. These properties allow for the precise control of a threshold voltage when SiO2 is used as a gate dielectric, allows for consistent and reliable processing of a MOSFET device. Dielectric materials are necessary to isolate connecting metals within a silicon MOSFET device. As such, the interface charge between the silicon in the MOSFET device and the dielectric materials has to be low enough to avoid affecting the density of electrons, which could reduce the effectiveness of the MOSFET's operations. Silicon is popular because its properties help achieve this goal.
There has been research into replacing silicon with Group III-V materials. A Group III-V material refers to a material that includes at least one element from Group III of the periodic table of elements and at least one element from Group V of the periodic table of elements. By replacing silicon, semiconductor devices using Group III-V materials offer advantages such as higher electron mobility, higher electric breakdown field, and larger band-gap. These advantages make Group III-V material systems suitable for high voltage and high temperature operation. For example, in a high voltage field effect transistor (FET), the typical voltage applied across the gate and the source could be quite small (from −20V to +10V) while the voltage across the drain and the source can vary widely (from 0V to >5000V), depending on the applications. To sustain such a high voltage, Group III-V materials with a high breakdown field such as GaN offer advantages over semiconductors such as silicon.
However, forming reliable Group III-V material systems for high-voltage applications is not without significant challenges. Unlike silicon, which is a pure (i.e., non-polar) material system and having inversion symmetry, a Group III-V material is a polar compound where electrons are more attracted to the Group V material than the Group III material. When dielectric materials are deposited onto Group III-V materials, the polarity of such materials creates an undesirable high interface charge density at the interface between the Group III-V material and the deposited dielectric material.
Typically, most of the polarization of the III-V material can be contained within the crystalline structure, but at the termination point of the crystalline structure (e.g., the surface of the III-V material), dangling bonds induce surface states (resulting in very high surface charge densities) between the III-V material and the surface of the deposited dielectric material. Therefore, conventional dielectric materials such as SiO2 or Silicon Nitride (Si3N4) are not compatible with III-V materials.
As of a result of these properties of Group III-V materials, SiO2 or another oxide-based dielectric material deposited on top of Group III-V materials such as Aluminum Gallium Nitride (AlGaN) or GaN causes the oxide-based dielectric material to react with the dangling bonds on the surface of the III-V material resulting in a hard-to-control interface leading to non-uniformity. Non-uniformity is undesirable because it causes random defects and trapped charges at the interface between the dielectric layer and the substrate leading to uncertain conditions for further processing of the substrate. Consequently, it is difficult to fabricate a high performance semiconductor device on a Group III-V substrate using an oxide-based dielectric on a large scale.
Furthermore, the charge density at the interface is highly sensitive to the deposition conditions and surface cleaning methods. Because of the sensitivity of the deposition process to these factors, repeatability of the deposition process between conventional dielectric materials and Group III-V materials is not reliable, which in turn causes large threshold voltage variation either across the wafer or between wafers.
The commercialization of Group III-V MOSFETs has been further hampered by the lack of availability of a stable gate oxide and stable passivation material. Another issue is the lack of a repeatable and reliable dielectric material for Group III-V material systems.
Therefore, what is needed is a way to resolve the issues arising from the surface charges of the of Group III-V materials.